Design of the UltraSPARC Instruction Fetch Unit

Designing a modern microprocessor is a complex task that demands careful balance between cycle time, cycles-per-instruction, and area costs. In particular, the instruction fetch unit greatly affects the performance of a multi-issue processor. It must provide adequate bandwidth to sustain peak instruction issue rate, and must predict future instruction sequences with high accuracy. In the UltraSPARC prefetch and dispatch unit design, we examined a technique that combined two prediction methods: predictive set-associative cache and in-cache prediction. This combination was compared with alternative designs such as direct-mapped and set-associative caches, and a branch history table and a branch target buffer. We chose the combined prediction technique for its fast cycle time, lower cycles-perinstruction, and lower area costs. This paper summarizes the trade-off decisions made in the design of the UltraSPARC instruction prefetch and dispatch unit. email address: [email protected] © Copyright 1996 Sun Microsystems, Inc. The SML Technical Report Series is published by Sun Microsystems Laboratories, a division of Sun Microsystems, Inc. Printed in U.S.A. Unlimited copying without fee is permitted provided that the copies are not made nor distributed for direct commercial advantage, and credit to the source is given. Otherwise, no part of this work covered by copyright hereon may be reproduced in any form or by any means graphic, electronic, or mechanical, including photocopying, recording, taping, or storage in an information retrieval system, without the prior written permission of the copyright owner. TRADEMARKS Sun, Sun Microsystems, and the Sun logo are trademarks or registered trademarks of Sun Microsystems, Inc. UNIX is a registered trademark in the United States and other countries, exclusively licensed through X/Open Company, Ltd. All SPARC trademarks, including the SCD Compliant Logo, are trademarks or registered trademarks of SPARC International, Inc. SPARCstation, SPARCserver, SPARCengine, SPARCworks, and SPARCompiler are licensed exclusively to Sun Microsystems, Inc. All other product names mentioned herein are the trademarks of their respective owners. For information regarding the SML Technical Report Series, contact Jeanie Treichel, Editor-in-Chief . The entire series may also be reviewed on the internet at http://www.sunlabs.com.